To extend Moore’s Law, transistor footprints have been scaled down to just a few tens of nanometers. Traditional planar transistors with thick channel materials suffer from severe short-channel effects. To address this, thinner materials and advanced structures such as FinFETs and gate-all-around (GAA) architectures are employed. 1D and 2D materials are expected to follow this trend, as they are inherently suited for future technology nodes. However, their dangling-bond-free and mechanically fragile nature presents significant challenges for forming such device architectures. New materials and deposition techniques are essential to enable these advanced structures.